IT 365 Milestone Four Guidelines and Rubric
System Components
Overview: The final milestone will focus on the components of your operating system. This research will culminate a complete analysis of your chosen OS and
will detail the file system, detail the program development, and address distributive systems of it. Review each milestone submission and review the instructor
feedback to ensure you have fully addressed the perspective of each topic.
Prompt: Even though not all systems have the same structure, many modern operating systems share the same goal of supporting the types of system
components below. The operating system manages many kinds of activities ranging from user programs to system programs like print spooler, name servers,
and file servers—to name a few. The research perspective for this milestone will be based on developing a computer program that is running your chosen OS.
To complete this assignment, you must address the following topics related to the system components of your chosen OS:
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How the chosen operating system approaches process management
How the chosen operating system approaches memory management
How the chosen operating system approaches file management
How the chosen operating system approaches system resource management
Rubric
Guidelines for Submission: Your assignment should be 1 to 2 pages in length with double spacing. Conform to academic writing standard expectations for
mechanics, content organization, and use of APA style.
Critical Elements
Process
Management
Memory
Management
File Management
System Resource
Management
Proficient (100%)
Meets “Proficient” criteria and description
offers a nuanced understanding of process
management within an operating system
Meets “Proficient” criteria and description
offers a nuanced understanding of memory
management within an operating system
Meets “Proficient” criteria and description
offers a nuanced understanding of file
management within an operating system
Meets “Proficient” criteria and description
offers a nuanced understanding of system
resource management within an operating
system
Needs Improvement (75%)
Describes how the operating system
approaches process management but
description is cursory or contains inaccuracies
Describes how the operating system
approaches memory management but
description is cursory or contains inaccuracies
Describes how the operating system
approaches file management but description
is cursory or contains inaccuracies
Describes how the operating system
approaches system resource management
but description is cursory or contains
inaccuracies
Not Evident (0%)
Does not describe how the operating system
approaches process management
Value
25
Does not describe how the operating system
approaches memory management
25
Does not describe how the operating system
approaches file management
20
Does not describe how the operating system
approaches system resource management
20
Articulation of
Response
Submission is free of errors related to
citations, grammar, spelling, syntax, and
organization and is presented in a
professional and easy-to-read format
Submission contains errors related to
citations, grammar, spelling, syntax, or
organization that negatively impact
readability and articulation of main ideas
Submission contains critical errors related to
citations, grammar, spelling, syntax, or
organization that prevent understanding of
ideas
Total
10
100%
IT 365 Module Five Run the Code Guidelines and Rubric
Designing a Virtual Memory Manager Response
Overview: For this activity, download the paging program and the Designing a Virtual Memory Manager source code and run the programs with the NetBeans
integrated development environment (IDE). You will need to place comments in the code where identified and respond to the challenge questions associated
with this assignment. The purpose of this activity is to give you an understanding of how the code works.
Before beginning, review the code that relates to this activity.
Activity Review: Paging
Assuming that a system has a 32-bit virtual address, write a Java program that is passed (1) the size of a page and (2) the virtual address. The program will report
the page number and offset of the given virtual address with the specified page size. Page sizes must be specified as a power of 2 and within the range 1024–
16384 (inclusive). Assuming such a program is named Address, it would run as follows:
java Address 4096 19986
and the correct output would appear as:
The address 19986 contains:
page number = 4
offset = 3602
Activity Review: Virtual Memory Manager
Designing a Virtual Memory Manager
This project consists of a Java program that translates logical to physical addresses for a virtual address space of size 2 16 = 65,536 bytes. The program will read
from a file containing logical addresses and, using a translation lookaside buffer (TLB) as well as a page table, will translate each logical address to its
corresponding physical address and output the value of the byte stored at the translated physical address.
Your program will read a file containing several 32-bit integer numbers that represent logical addresses. However, you need only be concerned with 16-bit
addresses, so you must mask the rightmost 16 bits of each logical address. These 16 bits are divided into (1) an 8-bit page number and (2) 8-bit page offset.
Hence, the addresses are structured as shown in Figure 9.33.
Figure 9.33
Address Structure
Other specifics include:
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28 entries in the page table
Page size = 28 bytes
16 entries in the TLB
Frame size = 28 bytes
256 frames
Physical memory = 65,536 bytes (256 frames × 256-byte frame size)
Additionally, your program need only be concerned with reading logical addresses and translating them to their corresponding physical addresses. You do not
need to support writing to the logical address space.
Address Translation
The program will translate logical to physical addresses using a TLB and page table as outlined in Section 8.4. First, the page number is extracted from the logical
address and the TLB is consulted. In the case of a TLB-hit, the frame number is obtained from the TLB. In the case of a miss, the page table must be consulted. If
the frame number cannot be obtained from the page table, a page fault occurs. A representation of the address translation process appears in Figure 9.34.
Figure 9.34
A Representation of the Address Translation Process
Handling Page Faults
The program will implement demand paging as described in Section 9.2. The backing store is represented by the file BACKING_STORE, a binary file of size 65,536
bytes. When a page fault occurs, you will read in a 256-byte page from the file BACKING_STORE and store it in an available page frame in physical memory. For
example, if a logical address with page number 15 results in a page fault, your program will read in page 15 from BACKING_STORE (remember that pages begin
at 0 and are 256 bytes in size) and store it in a page frame in physical memory. Once this frame is stored (and the page table and TLB are updated), subsequent
accesses to page 15 will be resolved by either the TLB or the page table.
You will need to treat BACKING_STORE as a random-access file, which will allow you to randomly seek to certain positions in the file for reading. We provide an
example program RAF.java (available on WileyPLUS) that illustrates using the API with the java.io.RandomAccessFile class. Finally, make sure that
when using BACKING_STORE, you open it for reading only, as only reads are necessary and you do not want to overwrite the file:
fileName = new File(“BACKING_STORE”);
backingStore = new RandomAccessFile(fileName, “r”);
The size of physical memory is the same as the size of the virtual address space—65,536 bytes—so you do not need to be concerned about page replacements
during a page fault. Later in this project, a modification to this project using a smaller amount of physical memory is described. This modification requires a pagereplacement strategy.
Test File
WileyPLUS provides the file InputFile.txt, which contains integer values representing logical addresses ranging from 0 through 65535 (the size of the virtual
address space). Your program will open this file, read each logical address, translate it to its corresponding physical address, and output the value of the signed
byte at the physical address.
How to Begin
Write a simple program that extracts the page number and offset from the following integer numbers (based on Figure 9.33):
Perhaps the easiest way to do this is by using the Java operators for bit-masking and bit-shifting. Once you can correctly establish the page number and offset
from an integer number, you are ready to begin.
Initially, we suggest you bypass the TLB and use a page table, only integrating the TLB once your page table is working properly. Remember, address translation
can work without a TLB; the TLB only serves to make it faster. When you are ready to implement the TLB, recall that it only has 16 entries, so you will need to
use a replacement strategy when you must update a full TLB. You may use either a FIFO or an LRU policy for updating your TLB.
How to Run the Program
Your program should run as follows:
java AddressTranslator InputFile.txt
Your program will read in the file InputFile.txt, which contains 1,000 logical addresses ranging from 0 to 65535. Your program is to translate each logical
address to a physical address and determine the contents of the signed byte stored at the correct physical address.
Your program is to output the following values:
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The logical address being translated (the integer value being read from InputFile.txt)
The corresponding physical address (your program’s translation of the logical address)
The signed byte value stored at the translated physical address
WileyPLUS also provides the file correct.txt, which contains the correct output values for the file InputFile.txt. Use this file to determine if your
program is correctly translating logical to physical addresses.
Statistics
After completion, your program is to report the following statistics:
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Page fault rate—The percentage of address references that resulted in page faults
TLB hit rate—The percentage of address references that were resolved in the TLB
Since the logical addresses in InputFile.txt are generated randomly and do not reflect any memory access locality, do not expect to have a high TLB hit
rate.
Modifications
This project assumes that physical memory is the same size as the virtual address space. In practice, physical memory is typically much smaller than a virtual
address space. Modify your program to use a smaller physical address space. Rather than using 256 page frames, try using 128. This will require your program to
keep track of free page frames as well as implementing a page-replacement policy using either FIFO or LRU (Section 9.4).
Challenge Questions
After you have completed the program code, respond to the challenge questions below. Be sure your response includes proper rationale to support your
reasoning.
Challenge Question One
On a system with paging, a process cannot access memory that it
does not own. Why? How could the operating system allow access
to other memory? Why should it or should it not?
Challenge Question Two
What is the purpose of paging the page tables?
Specifically, the following critical elements must be addressed:
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Comments: Comment in the code at every “Comment Here” section.
Running the code: Download the source code and run the program with the NetBeans IDE.
Challenge question: Provide detailed analysis with supporting elements that addresses each question.
Rubric
Guidelines for Submission: To properly complete this assignment, submit three files: two Java files and a Word document containing responses to the challenge
questions. Your Word document should list each challenge question followed by your response. Be sure you cite any academic sources in APA style.
Critical
Elements
Comment Code
Exemplary
Proficient
Needs Improvement
Not Evident
Value
Meets “Proficient” criteria and
comments demonstrate nuanced
understanding of the code
(100%)
Comments throughout the
provided code to explain how the
code works (85%)
Comments throughout the
provided code to explain how the
code works but lacks detail (55%)
Does not comment throughout
the provided code to explain how
the code works (0%)
40
Runs code, ensuring that there
are no errors present that might
prevent code from working
properly (100%)
Responses demonstrate a general
understanding of the program
setup and performance ability
(85%)
Runs code but there are errors
that prevent code from working
properly (55%)
Does not run code or show any
proof of running code (0%)
40
Responses require additional
support to demonstrate an
understanding of the program
setup (55%)
Responses are vague and unable
to correlate to the setup and
performance of the program
ability (0%)
20
Compile and
Run Code
Challenge
Question
Response
Responses meet “Proficient”
criteria and demonstrate
complete comprehension of the
programs setup and performance
ability (100%)
Total
100%

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